When a high voltage swing (e.g. >3.3 Vpp) is desired on an integrated circuit (IC), a special high-voltage process is typically chosen. Such processes are, however, typically not applicable for ultra-low power applications (or expensive to use).
The thick oxide transistors (e.g. I/O-transistors) in standard CMOS integrated circuit processes can typically handle up to 5 V +/−10%, 3.3 V +/−10%, 2.5 V +/−10%, or 1.8 V +/−10%. Therefore the vast majority of all integrated circuits are designed to handle voltages lower than this. Special high voltage processes are available but they are typically not well suited for ultra low power design because the smallest, advanced, low power transistors (deep submicron) are not available.
In some cases, support of larger voltage swing gives significant benefit to the application. This is e.g. the case for an antenna interface between an RF-IC (radio frequency integrated circuit, radio frequencies (RF) being e.g. defined as the frequency range between 3 kHz and 3 GHz) and an antenna resonating with the input capacitance of the RF-IC. In such cases a larger voltage swing (for a given needed transmit power) enables the use of an antenna with a higher impedance (e.g. a larger inductance). This gives less on-chip capacitance (for a given frequency of operation), and hence significant IC die area can be saved. Another important benefit of a higher impedance in such systems is that weak received signals also have higher voltage swing. This gives significantly lower current consumption in the receiver and/or better sensitivity of the radio.
US 2008/0200134 A1 deals with a transmitting device for outputting a transmission signal, an antenna device for emitting the transmission signal in the form of an electromagnetic wave, and a matching device which is electrically connected to the transmitting device and to the antenna device. The matching device includes at least two tuning elements for setting the resonant frequency of a circuit arrangement, formed from the antenna device and the first and second tuning elements, and for matching the impedance of the transmitting device and the antenna device. In an embodiment, capacitor dividers, such as a capacitor bank, are used in a single ended input in order to provide impedance transformation that enables low power operation and matching to an input port.
US 2006/0006950 A1 describes a power amplifier comprising cascode arrangements to achieve target performance levels for a power amplifier, such as the type used in wireless communication devices. A negative resistance circuit is provided for the cascode arrangement such that high gain, or oscillation, is promoted during operation of the power amplifier. In one embodiment, the negative resistance circuit includes cross-coupling transistors. Various features are provided in order to reduce the susceptibility of the power amplifier to voltage breakdown while maintaining good performance.
A relatively large voltage swing on an antenna can e.g. be adapted to lower levels (e.g. tolerable for an integrated circuit) by a suitable impedance transformation. Such transformation is typically implemented by separate discrete components (off-chip) to limit voltage swing or to maximize design flexibility or to improve the Q-factor or—in case of large capacitance values—to decrease costs. Alternatively, on-chip or off-chip inductive transformers can be used; on-chip transformers, however, only at frequencies higher than e.g. 100 MHz.